The present invention relates to package for a semiconductor device and, more particularly, to a package for a semiconductor device and including a metal substrate.
A package for a semiconductor device called BGA packages are taught in, e.g., Japanese Patent Application No. 7-127395 (Proir Art 1 hereinafter), "ELECTRONIC NEWS", Monday Mar. 6, 1995 (Prior Art 2 hereinafter), and "OVER MOLDED PAD ARRAY CARRIER (OMPACK)", presented by Jim Sloan et al at The FIRST VLSI PACKAGING WORKSHOP, Nov.-Dec., 1992 (Prior Art 3 hereinafter). However, Prior Arts 1-3 each has some problems left unsolved, as follows.
Prior Art 1 lowers productivity because it removes an insulator and copper foil over a broad area for mounting an LSI (Large Scale Integrated Circuit). Specifically, via holes and a cavity each have a large size which lowers process stability, i.e., etching accuracy. In addition, because the LSI is directly mounted to a copper plate wia a mounting material, a stress occurs between the LSI and the copper plate due to a difference in thermal expansion.
Prior Art 2 positions a silicon chip on the same side as solder bumps. Therefore, an area for forming the solder bumps is available only around the silicon chip, obstructing a multipin arrangement. Prior Art 2 also causes a stress to occur between the silicon chip and a copper plate.
Prior Art 3 includes a heat radiation path extending from the surface of a silicon chip to solder bumps via a front copper foil wiring pattern, metal plating on the walls of heat radiation via holes, and a rear copper foil wiring pattern. However, the heat radiation path is so long, resistance to heat required of the package cannot be reduced beyond a certain limit. Moreover, a substrate is formed of glass epoxy which is extremely low in thermal conductivity and makes it extremely difficult to noticeably reduce resistance to heat.
Technologies relating to the present invention are also taught in, e.g., Japanese Patent Laid-Open Publication No. 61-288495.